LLMs can serve as unified intelligent interfaces for hardware design automation, but realizing autonomous agentic EDA requires solving challenges around specification understanding, design correctness verification, and integration with existing CAD tools.
This paper examines how Large Language Models can automate front-end chip design tasks like HDL generation, testbench creation, and design optimization. It traces the evolution from LLM-assisted tools to fully autonomous agentic systems, reviews current advances in circuit generation and synthesis, and identifies key challenges in deploying LLMs for Electronic Design Automation workflows.